Data slicer

Details Data slicer Data slicer

2007-05-15

2007-05-15

Ghayour, Mohammed (Department: 2611)

Pulse or digital communications

Receivers

Automatic baseline or threshold adjustment

C375S334000, C375S316000, C358S474000

Reexamination Certificate

active

10412221

ABSTRACT:
Data of the packet header is digitalized by a slicer circuit of a floating slice level mode, which follows DC voltage fluctuation, and packet data other than the packet header is digitalized by a slicer circuit of a fixed slice level mode, which does not follow DC voltage fluctuation. A default slice level of the fixed slice level mode is created by using demodulated data in a packet header section so as to accurately carry out switching of slicing methods. Obtained is a data slicer capable of accurately carrying out digitalization with respect to a signal, which is demodulated after being received.

REFERENCES:
patent: 5732110 (1998-03-01), Richards
patent: 5960046 (1999-09-01), Morris et al.
patent: 6041084 (2000-03-01), Nagaraj
patent: 6735260 (2004-05-01), Eliezer et al.
patent: 6898253 (2005-05-01), McNally
patent: 63-090221 (1988-04-01), None

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