Data slice circuit

Details Data slice circuit Data slice circuit

1992-11-20

1995-11-21

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

327 78, 327 87, 327184, H03K 5153, H03K 1200

Patent

active

054690919

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

The present invention relates to a data slice circuit having a function for slicing data signals such as caption data at an optimum voltage.


BACKGROUND OF THE RELATED ART

In recent years, the necessity of adding a tele-caption function to a television set has arisen from the consideration of an auditory handicapped person. Accordingly, the necessity of installing a one-chip microcomputer containing a caption decoder has been increasing.
FIG. 5 shows a data slice circuit of prior art, wherein numeral 1 is a comparator having a caption data input and a reference voltage input, and numeral 2 is a block representing the caption decoder accepting the output of the comparator 1 as its input.
The operation of a slice level correction circuit constituted as described above, is explained below.
First, the reference voltage of the comparator 1 is set to a constant value. The caption data input into the comparator 1 are sliced taking the reference voltage as its reference and then input into the caption decoder 2. By looking up the result of the caption decoder, when the slice level is anomalous and hence the caption data cannot be taken in correctly, once again the caption data are taken in with changing the reference voltage of the comparator 1.
In the above constitution, however, whether the caption data are correctly sliced and input into the caption decoder or not must be judged by the result obtained through the caption decoder by seeing the character data appearing on, e.g., a television screen. The slice level must be corrected in accordance with this result. In order to achieve this, due to the diversity of various tele-caption systems, there has been a problem in that the check and correction of slice levels were required.
A data slice circuit having a function by which the slice level of caption data is corrected was disclosed in the Gazette of Japanese Unexamined Patent publication Sho 61-43886 (Inventor: Teiji OKAMOTO). This circuit is a circuit wherein a signal including predetermined n-pulse trains (clock-run signal) is converted into digital data by a comparator which compares them with a reference voltage. It comprises a pulse width detection means for detecting the pulse width of the above-mentioned n-pulse train, an averaging means for averaging the output of the above-mentioned pulse width detection means and a digital-to-analog conversion means for converting the output of the above-mentioned averaging means into analog voltage, and thereby the output voltage of the above-mentioned digital-to-analog conversion means is taken as the reference voltage of the above-mentioned comparator.
There has been a problem in that the above-mentioned circuit was not suited for circuit integration because the circuit became large since it necessitated an averaging means, a memory means, and a digital-to-analog conversion means.
The present invention solves the above-mentioned existing problems and provides a data slice circuit that is suitable for circuit integration, which has functions for checking the slice level of the data signal and issues the signal for correcting the level thereof.


SUMMARY OF THE INVENTION

A data slice circuit of the present invention comprises: arbitrary one period of data signal with a first reference voltage, frequency of two or more times of the above-mentioned data signal, to the above-mentioned comparison means responding to the value of the above-mentioned bit train based on a predetermined rule.
In addition a data slice circuit of the present invention comprises: arbitrary one period of data signal with a first reference voltage, frequency of two or more times of the above-mentioned data signal, to the above-mentioned comparison means based on a predetermined rule and referring only to bits extracted from such parts that are included in effectively the same time period before and after the center of the above-mentioned one period out of the above-mentioned stored bit train.


BRIEF DESCRIPTION THE DRAWINGS

FIG. 1 and FIG. 2 are block diagrams of dat

REFERENCES:
patent: 4852126 (1989-07-01), Tanaka et al.
patent: 4873702 (1989-10-01), Chiu
Jacques Meyer, "Teletext: A True Monochip Solution", IEEE Transactions on Consumer Elec., Aug. 1990, 693-698.

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