Data round-off device for rounding-off m-bit digital data into (

Details Data round-off device for rounding-off m-bit digital data into ( Data round-off device for rounding-off m-bit digital data into (

1991-07-26

1993-06-08

Vai, Tan V.

Boots, shoes, and leggings

G06F 738

Patent

active

052185630

ABSTRACT:
A data round-off device receives a digital input signal of m-bit form (m is an integer) which has arithmetically been processed by addition, subtraction, multiplication, and division by an orthogonal transformer or predictive encoder is summed, if it is positive, with a value of 2.sup.(n-1) -1 (n is a natural number smaller than m) and if negative, with a value of 2.sup.(n-1) and the higher (m-n) bits of a resultant sum signal are delivered as the output of the data round-off device. Preferably, it is used for control of the number of bits if there is a difference in the number of bits between the data output of an orthogonal transformer and the data input of an encoder for encoding the data output of the orthogonal transformer.

REFERENCES:
patent: 3891837 (1975-06-01), Sunstein
patent: 4149261 (1979-04-01), Harigaya et al.
patent: 4553128 (1985-11-01), Pilost
patent: 4589084 (1986-05-01), Fling et al.
patent: 4722066 (1988-01-01), Armer et al.
patent: 4750146 (1988-06-01), Dalquist et al.

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