Data reproduction device with simplified circuit structure

Details Data reproduction device with simplified circuit structure Data reproduction device with simplified circuit structure

2002-12-31

2004-01-20

Jeanglaude, Jean (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C369S059160

Reexamination Certificate

active

06680684

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a data reproduction device reproducing recorded data applied to a data storage device such as an optical magnetic disk device, and more particularly relates to a data reproduction device capable of sampling a reproduction signal obtained from recorded data corresponding to a rising part and a falling part of the reproduction signal with a simple circuit structure.
2. Description of the Related Art
With recent development of a digital information society, use of a data reproduction device utilizing a magnetic disk, an optical magnetic disk or the like for storing information such as images is found in an increasing number of areas because of its high storage capacity, high reliability and exchangeability.
In general, a conventional data reproduction device executes the following steps for reproducing recorded data correctly even if each recording pit recorded on an optical magnetic disk is deformed by a change in its surrounding temperature.
FIG. 1
is a block diagram showing a circuit structure of a conventional data reproduction device used for reproducing recorded data. A data reproduction device
100
shown in
FIG. 1
includes an analog front end
101
, A/D (Analog/Digital) converters
102
and
103
, ML (Maximum Likelihood) decoders
104
and
105
, PLL (Phase-Locked Loop) circuits
106
and
107
, and a data composition circuit
108
.
The analog front end
101
receives an optical reproduction signal from a data storage device such as an optical magnetic disk device, and supplies the optical reproduction signal to the A/D converters
102
and
103
. The A/D converter
102
quantizes amplitude of a waveform of the optical reproduction signal based on a standard point, and outputs quantized data (amplitude) to the ML decoder
104
. The ML decoder
104
detects a rising part of the optical reproduction signal from the quantized data, generates a leading-edge detection signal corresponding to the rising part, and supplies the leading-edge detection signal to the PLL circuit
106
. Additionally, the ML decoder
104
decodes sample values sampled based on a leading-edge synchronous clock synchronous to the leading-edge detection signal, and then supplies decoded data to the data composition circuit
108
. Additionally, the PLL circuit
106
generates the leading-edge synchronous clock based on the leading-edge detection signal received from the ML decoder
104
, and supplies the leading-edge synchronous clock to the A/D converter
102
. Similarly, The A/D converter
103
quantizes the amplitude of the waveform of the optical reproduction signal based on a standard point, and outputs quantized data (amplitude) to the ML decoder
105
. The ML decoder
105
detects a falling part of the optical reproduction signal from the quantized data, generates a trailing-edge detection signal corresponding to the falling part, and supplies the trailing-edge detection signal to the PLL circuit
107
. Additionally, the ML decoder
105
decodes sample values sampled based on a trailing-edge synchronous clock synchronous to the trailing-edge detection signal, and then supplies decoded data to the data composition circuit
108
. Additionally, the PLL circuit
107
generates the trailing-edge synchronous clock based on the trailing-edge detection signal received from the ML decoder
105
, and supplies the trailing-edge synchronous clock to the A/D converter
103
. Furthermore, the data composition circuit
108
composes the decoded data supplied from the ML decoders
104
and
105
, and outputs composed data as reproduced data therefrom.
As described above, a conventional data reproduction device achieves accurate decoding of recorded data by including an A/D converter, an ML decoder and a PLL circuit for decoding the optical reproduction signal based on the leading-edge synchronous clock, and for decoding the optical reproduction signal based on the trailing-edge synchronous clock.
However, the conventional data reproduction device includes the A/D converters
102
and
103
used for detecting the leading edge and the trailing edge respectively. Thus, a cost of producing such a conventional data reproduction device increases with an increase in the number of parts implemented for detecting the leading edge and the trailing edge separately, and with an increase in an area of implementing the parts in the conventional data reproduction device. Additionally, by fabricating digital circuits and analog circuits intermingled as an LSI (Large Scale Integrated) circuit, the number of gates on the LSI circuit increases. Consequently, power consumed by the LSI circuit increases.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a data reproduction device reproducing data from a recording medium. A more particular object of the present invention is to provide a data reproduction device capable of sampling data based on a leading edge and a trailing edge of a recording pit of a recording medium with a simplified circuit structure.
The above-described object of the present invention is achieved by a data reproduction device including an A/D converter quantizing a reproduction signal read from data recorded on a recording medium to produce quantized data based on a sampling clock; a reproduction signal determination unit determining rising and falling parts of the reproduction signal based on the quantized data, and outputting a gate signal corresponding to a result of determining the rising and falling parts; a leading-edge clock generation unit generating a leading-edge clock signal synchronous to a leading edge indicating a rising part of the reproduction signal; a trailing-edge clock generation unit generating a trailing-edge clock signal synchronous to a trailing edge indicating a falling part of the reproduction signal; a signal switch unit generating the sampling clock by selecting one of the leading-edge clock signal and the trailing-edge clock signal based on a value of the gate signal; and a signal supply unit supplying the sampling clock to the A/D converter, wherein the data reproduction device reproduces the data recorded on the recording medium by executing digital signal processing on the quantized data.
According to the present invention, the data reproduction device is capable of sharing a single A/D converter and a single decoder for reproducing recorded data based on a clock synchronous to a leading edge of a recording pit and a clock synchronous to a trailing edge of the recording pit. As a result, a circuit structure of the data reproduction device is simplified, thereby achieving decrease in a size of an implementation area and in the number of implemented parts in the circuit structure of the data reproduction device. Additionally, the data reproduction device according to the present invention effectively achieves decreases in cost and consumed power.
Other objects, features and advantages of the present invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings.


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patent: 5598389 (1997-01-01), Nakano et al.
patent: 5745468 (1998-04-01), Nakano
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patent: 9-73734 (1997-03-01), None
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