Data register and access method thereof

Details Data register and access method thereof Data register and access method thereof

2002-04-26

2003-10-28

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S171000

Reexamination Certificate

active

06639834

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a non-volatile storage element to be integrated on a semiconductor chip, more particularly to a register that employs MTJ (Magnetic Tunnel Junction) elements used in an MRAM (Magnetic Random Access Memory), as well as a data storing method and a data reading method to be employed for the register.
BACKGROUND OF THE INVENTION
A register block
20
is a circuit block used to store data temporarily. The register block
20
, as shown in
FIG. 4
, is composed of a flip-flop circuit formed with a combination of NAND circuits
40
a
and
40
b
. The register block stores “0” or “1” data according to the combination of signals entered to the input lines S and R.
In the register block
20
, when a “High” level signal is entered to the input line S and a “Low” level signal is entered to the input line R, the level of the Q
2
line becomes “High” and that of the Q
1
line becomes “Low”. When a “High” level signal is entered to the input line R and a “Low” level signal is entered to the input line S, the level of the Q
1
line becomes “High” and that of the Q
2
line becomes “Low”. The levels of the input lines S and R are decided by the data written in the register in such way. When a “High” signal is entered to each of the input lines S and R concurrently, the data entered to the register block
20
is held. Generally, when a “Low” signal is entered to each of the input lines S and R concurrently, the state of the register block
20
cannot be estimated, so that “Low” signals are never entered to the input lines S and R concurrently.
Conventionally, a latching circuit/register built in a logic chip loses data stored therein when the power supply is turned off. This is because data is stored in such a volatile storage element as a capacitor or a static latch. Consequently, the use of a non-volatile storage elements is very advantageous for many system application programs.
There are also non-volatile semiconductor memory chips such as flash memories. However, none of designing and development has been made for any logic chip provided with built-in non-volatile storing functions. This is because the logic chip, when it is provided with an internal non-volatile memory such as a flash memory, is more complicated than the conventional semiconductor logic chip. In addition, any of the existing semiconductor chip manufacturing processes cannot incorporate such a non-volatile storage element as a flash memory in a logic chip. Consequently, none of the logic chips provided in existing computer systems and used for application programs has such the non-volatile data storing function.
Under such circumstances, it is an object of the present invention to provide a register provided with functions for storing data into non-volatile storage elements, as well as a data storing method and a data reading method to be employed for the register.
SUMMARY OF THE INVENTION
In order to achieve the above object, the register of the present invention includes a register block for storing data; a data writing block provided with a non-volatile storage element enabled to store the data; and a data restoring block for reading data from the data writing block.
The data storing method of the present invention includes a step of outputting a high level signal from one of first and second logic circuits according to the data output from the register block; the high level signal turning on one of two pairs of switches connected to the first and second logic circuits, respectively, and writing data in the two storage elements with polarity according to which of the first and second pairs of switches is turned on.
The data reading method of the present invention includes a step of generating, with current mirror circuit, a differential signal according to the resistance values of the first and second storage elements, amplifying the differential signal, and holding the amplified differential signal.
A logic chip including the present invention is preferably configured so as to include magnetic tunnel junction (MTJ) elements, which are non-volatile storage elements. Thereby the logic chip can be designed and manufactured easily and the manufacturing cost can be reduced. In addition, because the logic chip uses non-volatile storage elements, data can be stored in them even after the power is turned off. Preferably, such non-volatile storage elements having MTJ elements are constructed so as to consume no power when power to the logic chip is turned off.


REFERENCES:
patent: 6324096 (2001-11-01), Tomita
patent: 6442092 (2002-08-01), Tomita

Affiliated with

Also associated with

Rating

Data register and access method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data register and access method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data register and access method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3140677