Data recovery device using a sampling clock with a half...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S157000, C375S376000

Reexamination Certificate

active

07135901

ABSTRACT:
A data recovery device using a sampling clock with a half frequency of data rate is disclosed, which includes a phase detection circuit, a charge pump and a double clock frequency oscillation circuit. The phase detection circuit receives a data signal and a first clock signal for generating an up-adjustment signal and a down-adjustment signal. The charge pump generates a control voltage in accordance with the up- and down-adjustment signals. The double clock frequency oscillation circuit receives the control voltage for generating the first clock signal with adjustment phase. The invention uses the sampling clock with a half frequency of the data rate not only reduces the die size, but also reduces the power consumption.

REFERENCES:
patent: 6442225 (2002-08-01), Huang
patent: 2004/0114632 (2004-06-01), Yuuki et al.
patent: 2004/0141577 (2004-07-01), Brunn et al.

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