Data recovery and clock circuit for use in data test equipment

Details Data recovery and clock circuit for use in data test equipment Data recovery and clock circuit for use in data test equipment

1986-05-20

1987-11-10

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 55, 328 75, 328 74, 307269, H04L 700, H03K 505

Patent

active

047060336

ABSTRACT:
A digital data and clock recovery circuit for use in a digital test head has a digital input port and a digital output port. A clock having a frequency several times the nominal bit rate of the input data drives several series-connected flip flops to generate a corresponding output pulse stream in which the pulses are of fixed pulse duration. Outputs are also taken from the flip flop array to generate a strobe pulse having a predetermined phase relationship to the output data pulses. The flip flop array operates on positive going pulses derived from a bipolar data input stream. An identical array is used to similarly condition negative going input data pulses, outputs from the arrays being combined to synchronize the strobe signal.

REFERENCES:
patent: 3593160 (1971-07-01), Moore
patent: 3925613 (1975-12-01), Kokado
patent: 3942124 (1976-03-01), Tarczy-Hornoch
patent: 3962540 (1976-06-01), Kokado
patent: 3980820 (1979-09-01), Niemi et al.
patent: 4618787 (1986-10-01), Jacksier et al.

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