Data receiver with synchronizing sequence detection circuit

Telegraphy – Systems – Line-clearing and circuit maintenance

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178 88, H04L 700

Patent

active

041307240

ABSTRACT:
A data receiver with synchronizing-sequence detection circuit which comprises a bandpass filter for selecting a channel signal component of carrier frequency f.sub.c, a zero-crossing detector, pulse interval measuring means and a pulse pattern analyzer, which detection circuit detects on the basis of the substantially constant period duration of f.sub.c the synchronizing period associated with the synchronizing sequence of which detects on the basis of the no longer constant period duration of f.sub.c the training period following after the synchronizing period.

REFERENCES:
patent: 3564419 (1971-02-01), Yackish
patent: 3902123 (1975-08-01), Oomen
patent: 3978407 (1976-08-01), Forney, Jr. et al.
patent: 4063244 (1977-12-01), Van de Kop

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