Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Patent
1997-12-24
2000-10-03
Chin, Stephen
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
375327, 375354, 375371, 375373, 375376, 329325, 329360, 329361, 348538, H04L 700, H04L 2536, H04L 2540, H03D 324
Patent
active
061283576
ABSTRACT:
An adaptable, variable rate symbol timing recovery system for a digital sal receiver comprises an analog to digital (A-D) signal converter having analog signal input and digital data signal output terminals. A source of selectable, substantially fixed rate, data sampling clock signals is coupled to the A-D signal converter for sampling a signal received at the input at a predetermined, substantially fixed clock rate, depending on data rate and modulation of the received signal. A digital signal processing loop is coupled to the digital data signal output terminal for adjustably producing interdependent signals in synchronism with the data signals at the output terminal which are asynchronous with respect to the fixed rate clock signals. A Controller is provided for selectively configuring the data sampling clock signal source and the digital signal processing loop according to the data rate and modulation characteristics of the received signal.
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Bao Jay
Lu Cheng-Youn
Poon Tommy C.
Brinkman Dirk
Chin Stephen
Maddox Michael W.
Mitsubishi Electric Information Technology Center America, Inc (
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