Data read circuit

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518521, 36518907, 36518909, G11C 1606, G11C 1604

Patent

active

058897038

ABSTRACT:
Provided is a data read circuit that can execute data reading under a proper reference voltage in the event that element characteristics have been changed due to aged deterioration. When a sample memory cell (10a) is selected, a memory transistor (26a) in which no electrons are injected into its floating gate, enters ON state. At this time, a voltage (V.sub.22) is inputted to an input terminal (22) of a sense amplification (18), and a control circuit (13) detects the voltage (V.sub.22) to store it as a digital signal. On the other hand, when a sample memory cell (10b) is selected, a memory transistor (26b) in which electrons are injected into its floating gate, does not enter ON state. As a result, a voltage (V.sub.11) is inputted as it is, to the input terminal (22). The control circuit (13) detects the voltage (V.sub.11) to store it as a digital signal. Based on the two digital signals, the control circuit (13) sets a reference voltage (V.sub.REF), and a reference voltage generating circuit (14) generates this reference voltage.

REFERENCES:
patent: 5117392 (1992-05-01), Harada
patent: 5291452 (1994-03-01), Hotta
patent: 5659503 (1997-08-01), Sudo et al.
patent: 5708607 (1998-01-01), Lee et al.

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