Data protocol controller

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370 851, H04J 324

Patent

active

049072250

ABSTRACT:
An integrated data protocol controller (IDPC)(10) is disclosed which includes on a single chip a data link controller (DLC)(52), a universal asynchronous receiver-transmitter (UART)(54) and a dual port timing controller (DPTC)(56). The IDPC is designed to support bit-oriented protocols such as is used in integrated services digital networks (ISDN). A microprocessor interface (50) on the IDPC chip permits a user to control and monitor the IDPC functions via a local microprocessor (18). The IDPC can be connected to a host processor (595) which shares a random access memory (RAM)(22a) with the local processor, allowing interprocessor communication via memory-resident buffers and mailboxes. A set of control and status registers is available within each of the main blocks of the IDPC--the DLC, the UART and the DPTC--to permit user access and control of the respective blocks. The DLC, the UART and the DPTC provide enhanced functions beyond those available in individual chips realizing a DLC, a UART or a DPTC.

REFERENCES:
patent: 4225919 (1980-09-01), Kyu et al.
"AmZ8030.multidot.AmZ8530" Serial Communications Controller, Feb. 1983, Advanced Micro Devices.
"MC68561 Multi-Protocol Communications Controller", 1983, Motorola Inc.

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