Data processor with real-time diagnostic capability

Details Data processor with real-time diagnostic capability Data processor with real-time diagnostic capability

1994-03-30

1996-01-30

Beausoliel, Jr., Robert W.

G06F 1134

Patent

active

054886880

ABSTRACT:
A data processor (20) includes a diagnostic circuit (23) with a first-in, first-out memory (FIFO) (25) for storing sequential states of an internal bus, such as a program address bus. In one mode, the diagnostic circuit (23) halts a central processing unit (CPU) (21) and the FIFO (25) on the occurrence of an event condition, such as a hardware breakpoint. In a second mode, the diagnostic circuit (23) halts the FIFO (25) but keeps the CPU (21) in normal operation. Thus, the contents of the FIFO (25) may be examined through a serial port while the CPU (21) is executing instructions normally.

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Sasaki et al.; "16 bit High-Speed DSP .mu.PD77016;" NEC IC Microcomputer Sys., Ltd.; vol. 46, No. 2, pp. 75-78 (1993).
Steven H. Leibson; "In-Circuit emulators for .mu.Cs;" EDN; pp. 64-78 (1989).
Hunter Goatley; "The VMS Watchpoint Utility: Part I;" Perceptics Corp.; pp. 22-25 (1990).

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