Data processor with improved cyclic data buffer apparatus

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

G11C 1928, G11C 2100

Patent

active

041692896

ABSTRACT:
Apparatus for designating contiguous memory locations in a data memory as a circular data buffer. A limit register defines the topmost buffer location and a modulus register defines the length of the buffer. Circuitry detects violations of the upper boundary of the buffer and subtracts the buffer length from the address. Boundary violation circuitry also controls conditional execution of a data processor instruction which conditionally subtracts the buffer length from the address.

REFERENCES:
patent: 3391391 (1968-07-01), Simpson, Jr.
patent: 3411138 (1968-11-01), Andreae et al.
patent: 3469239 (1969-09-01), Richmond et al.
patent: 3564505 (1971-02-01), Finnila et al.
patent: 3573855 (1971-04-01), Cragon
patent: 3686641 (1972-08-01), Logan et al.
patent: 3742458 (1973-06-01), Inoue et al.
patent: 3878513 (1975-04-01), Werner
patent: 4078258 (1978-03-01), Lindsey et al.
patent: 4084258 (1978-04-01), Bluethman

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Data processor with improved cyclic data buffer apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data processor with improved cyclic data buffer apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processor with improved cyclic data buffer apparatus will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1987666

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.