Data processor with combined adaptive LMS and general multiplica

Details Data processor with combined adaptive LMS and general multiplica Data processor with combined adaptive LMS and general multiplica

1990-01-23

1991-03-19

Harkcom, Gary V.

Boots, shoes, and leggings

36472412, 364754, G06F 1531, G06F 752

Patent

active

050016610

ABSTRACT:
A data processing system uses the same structure and hardware to implement either a general purpose multiplier or arithmetic operations associated with the least-mean-squares (LMS) algorithm. Multiplier and adder circuits are time-shared to perform the myriad functions. In one form, further modified Booth's algorithm is utilized so that an output product of two binary input numbers may be quickly formed by executing a series of multiplications and accumulations. The operation is pipelined for continuous processing activity.

REFERENCES:
patent: 4025769 (1977-05-01), Simpson et al.
patent: 4121296 (1978-10-01), Snijders et al.
patent: 4597053 (1986-06-01), Chamberlin
patent: 4752903 (1988-06-01), Iwata et al.
patent: 4754419 (1988-06-01), Iwata
patent: 4907182 (1990-03-01), Giuliano et al.

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