Data processor with circuit for regulating instruction throughpu

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395381, 364707, G06F 132

Patent

active

060290064

ABSTRACT:
A data processor (10) incorporates instruction regulating or "throttling" circuitry (31) for limiting consumed power. A user visible register maintains an INTERVAL field by which instruction fetch from an instruction cache (14) is periodically delayed. This INTERVAL field may be adjusted to suit the power budget of the data processor.

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