Boots – shoes – and leggings
Patent
1992-09-02
1995-02-28
Harvey, Jack B.
Boots, shoes, and leggings
395425, 3642403, 364DIG1, 36493547, 364DIG2, G06F 1340
Patent
active
053945280
ABSTRACT:
A data processor capable of controlling memory accessing by the same controls regardless of the bus width to be used. A register is provided for storing data to be inputted and completing a block of data with a size equal to that of the whole bus width of the external data bus when the microprocessor accesses external memory by using only a part of the bus width of an external data bus according to a bus-sizing function. A bus interface is provided for starting memory access by dividing a bus cycle into plural portions according to the bus width and for controlling operation so as to access data equal in size to the case where the whole bus width of the external data bus is used for accessing.
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1987 IEEE International Test Conference Digest of Technology Papers, pp. 836-883, no month.
Kobayashi Souichi
Saito Yuichi
Auve Glenn A.
Harvey Jack B.
Mitsubishi Denki & Kabushiki Kaisha
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