Patent
1994-12-02
1997-04-22
Chan, Eddie P.
395440, 395445, 395465, G06F 1216
Patent
active
056236301
ABSTRACT:
A data processor is configured so that a mismatching does not occur between inputted or outputted data and data stored in a cache buffer region even when data is inputted or outputted by an application program to/from a block type device by bypassing the cache buffer region. A mismatched state eliminating unit is provided for copying data between the buffer for the application program to eliminate the mismatching when the mismatching results between the actually inputted or outputted data and the data stored in the cache buffer region. A selection condition holding unit is provided for holding a selection condition which determines whether or not to bypass the cache buffer region. An arbitrary value can be set in the selection condition holding unit by the application program. The block type device may comprise a flexible disk unit, a hard disk unit, or an optomagnetic disk unit.
REFERENCES:
patent: 4075686 (1978-02-01), Calle et al.
patent: 5293618 (1994-03-01), Tandai et al.
"Minix Operating System", A. S. Tanenbaum, Trans. Teryuo Onishi, pp. 364-377, Apr. 21, 1989, by Aski Inc.
Jim Handy, "The Cache Memory Book", 1993, Academic Press, pp. 64-84.
Chan Eddie P.
Kim Hong
Mitsubishi Denki & Kabushiki Kaisha
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