Data processor reorder shift register memory

Registers – Platform operated – Platform actuated traffic counters

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235 92DP, 235 92R, 235152, 235156, 3401725, H03K 2110

Patent

active

039886018

ABSTRACT:
Shift register data reordering system for reordering serial input data to an output data sequence according to a desired schema, using varying length registers with selective gating.

REFERENCES:
patent: 3266022 (1966-08-01), Minnick et al.
patent: 3275989 (1966-09-01), Glaser et al.
patent: 3371320 (1968-02-01), Lachenmayer
patent: 3721812 (1973-03-01), Schmidt
patent: 3766534 (1973-10-01), Beausoleil et al.
patent: 3781822 (1973-12-01), Ahamed
patent: 3783258 (1974-01-01), Chwastyk
patent: 3810112 (1974-05-01), Aho et al.
patent: 3816729 (1974-06-01), Works
patent: 3866023 (1975-02-01), Kadakia
patent: 3883727 (1975-05-01), Stuart et al.
patent: 3943347 (1976-03-01), Martinson

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