Data processor operating in a vector interrupt mode and register

Details Data processor operating in a vector interrupt mode and register Data processor operating in a vector interrupt mode and register

1989-11-27

1992-10-13

Chan, Eddie P.

Boots, shoes, and leggings

395775, 364DIG1, 3642808, 3642329, 3642421, 3642632, G06F 946, G06F 900

Patent

active

051558530

ABSTRACT:
A data processor comprises a central processing unit, a plurality of register banks used by the central processing unit when the central processing unit executes a given process, an interrupt controller responding to an interrupt request signal to generate an interrupt acknowledge signal and to select a predetermined register bank and also to start an interrupt handling program, a interrupt code generator for generating an interrupt code corresponding to an interrupt request when the interrupt request signal is generated, and an interrupt source register for holding the interrupt code after the interrupt request is acknowledged until a next interrupt request is acknowledged, so that a start address of the interrupt handling program is controlled in accordance with the contents of the interrupt source register.

REFERENCES:
patent: 4631363 (1986-12-01), Foster et al.
patent: 4769768 (1988-09-01), Bomba et al.
patent: 4949333 (1990-08-01), Gulick et al.

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