Data processor having split level control store

Details Data processor having split level control store Data processor having split level control store

1990-07-25

1992-03-31

Shaw, Gareth D.

Boots, shoes, and leggings

3642627, 3642628, 3642631, 364DIG6, G06F 928, G06F 938

Patent

active

051013444

ABSTRACT:
A data processor having a split level control store structure, which partitions program memory into a macrocode portion and a microcode portion. The data processor contains two distinct machines, a macromachine and a micromachine. The macromachine includes an instruction sequence controller which detects the macrocode branch instruction before it is perceived by the micromachine, extracts from the branch instruction a macroaddress, and then provides the extracted macroaddress to the program memory as the next sequential instruction address. By "pipelining" the macromachine, the macromachine can "execute" the branch instruction in parallel with, and independent of, the execution by the micromachine of the preceeding instruction.

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