Data processor having single clock pin

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307269, G06F 104

Patent

active

044096712

ABSTRACT:
A microprocessor on a monolithic integrated circuit is provided having a single clock input pin for receiving a clock input signal. The clock input signal is used to gate address data onto the address bus and to enable a data input dynamic latch. In addition the input clock signal is used to generate two complementary non-overlapping clock signals used for synchronizing purposes within the microprocessor.

REFERENCES:
patent: 3753241 (1973-08-01), Bayne
patent: 3757310 (1973-09-01), Croxon
patent: 3950654 (1976-04-01), Broedner et al.
patent: 3972025 (1976-07-01), Taddei
patent: 4086626 (1978-04-01), Chung
patent: 4095267 (1978-06-01), Morimoto
patent: 4099232 (1978-07-01), Mensch, Jr.
"Motorola M6800 Microprocessor Application Manual" 1975, pp. 4-1 to 4-6.
Digital Design with Standard MSI and LST, Blakeslee, 1975, pp. 140-143.
Microprocessors and Microcomputers, Soucek, pp. 379-386.
The Design of Digital Systems, Peatman, 1972, pp. 118-120.

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