Data processor for generating pulse signal in response to extern

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395800, 364270, 364DIG1, 327172, G06F 104, G06F 124

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active

053773470

ABSTRACT:
A pulse generator includes an event counter receiving an external clock for counting the external clock, a first compare register coupled to the event counter for generating a first equal signal when a count value of the event counter becomes equal to a value set in the first compare register. The first equal signal is supplied to the event counter so as to clear the event counter. A free-running counter receives an internal clock for counting the internal clock, and a second compare register is coupled to the free-running counter for generating a second equal signal when a count value of the free-running counter becomes equal to a value set in the second compare register. A first flipflop is set by the first equal signal and reset by a write signal for the second compare register, and a second flipflop is set by the first equal signal, and reset by the second equal signal when the tint flipflop is in a reset condition, so as to generate an external pulse signal, so that even if the second equal signal is generated, the external pulse signal is never reset unless the first flipflop has been reset.

REFERENCES:
patent: 4257108 (1981-03-01), Igel
patent: 4258300 (1981-03-01), Fromont
patent: 4550307 (1985-10-01), Akashi et al.
patent: 4996474 (1991-02-01), Tambe et al.
patent: 5126944 (1992-06-01), Sakuma et al.
patent: 5146601 (1992-09-01), Hosaka et al.

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