Boots – shoes – and leggings
Patent
1981-03-25
1983-07-19
Ruggiero, Joseph F.
Boots, shoes, and leggings
G06F 100
Patent
active
043947352
DESCRIPTION:
BRIEF SUMMARY
DESCRIPTION
BACKGROUND OF THE INVENTION
The present invention relates to a data processor controlled by microprograms, and more particularly to a data processor which can execute machine instructions having suboperation codes without using a large capacity control memory and complex hardware.
In general, in a data processor controlled by microprograms, there are provided microprograms each of which corresponds to a machine instruction and each of which consists of one or more micro instructions. These microprograms are stored in a control memory, and when a machine instruction is to be executed, a microprogram corresponding to the machine instruction is read out from the control memory and executed, so that the control necessary for the execution of the machine instruction is provided.
In a conventional data processor controlled by the microprograms, the control memory address of the microprogram, necessary for executing a machine instruction which has no suboperation code, is obtained by using an operation code of the machine instruction as an address in the control memory. That is, by accessing the control memory at the address designated by the operation code of the machine instruction stored in an instruction register, the first micro instruction of the microprogram corresponding to the machine instruction is read out and stored in a micro instruction registor and executed.
However, in a recent data processor, machine instruction having suboperation codes, in addition to the above-mentioned operation codes, are used in order to expand the functions of the machine instructions. In such a data processor, if the operation code and the suboperation code are combined and used as an address for the control memory in a manner similar to the above-mentioned conventional data processor in order to execute such a machine instruction having the suboperation code, it is necessary to use a very large capacity control memory and thus the cost of hardware of the data processor is increased. Moreover, since the number of the machine instructions is usually much smaller than the binary number expressed by the total number of bits in the operation code and the suboperation code, only a part of the control memory is filled by the micro instructions, if a large capacity control memory is used, and thus the control memory is not effectively utilized.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a data processor controlled by microprograms which can execute the aforementioned machine instructions having suboperation codes, at a high speed, without using a large capacity control memory and complex hardware.
It is another object of the present invention to provide a data processor which has expanded functions for the instructions, and whose functions of the instructions can be changed easily by changing the microprograms.
In the present invention, there is provided a data processor controlled by microprograms comprising an instruction register in which is stored a machine instruction having a suboperation code in addition to an operation code. The data processor further comprises a micro instruction register, which temporarily stores a micro instruction read out from said control memory. The read out is performed by using the operation code of the machine instruction stored in the instruction register and suboperation index codes. The suboperation index codes are contained in a micro instruction read out from the control memory by using the suboperation code of said machine instruction, a selector and a means for logical operation. Each of said micro instructions, which are stored in the control memory and read out by using said operation code, have a next address field and an address control field. Said selector selects one of said suboperation index codes according to the contents of said address control field. The next reading out from said control memory being performed by using a next address data obtained by a logical operation betwen the contents of said next address field and the
REFERENCES:
patent: 3634883 (1972-01-01), Kreidermacher
patent: 3781823 (1973-12-01), Senese
patent: 3900835 (1975-08-01), Bell et al.
patent: 4057850 (1977-11-01), Kaneda et al.
patent: 4070703 (1978-07-01), Negi
patent: 4124893 (1978-11-01), Joyce et al.
patent: 4168523 (1979-09-01), Chari et al.
Satoh Kiyosumi
Watanabe Nobuyuki
A. Aoki & Associates
Fleming Michael R.
Ruggiero Joseph F.
LandOfFree
Data processor controlled by microprograms does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data processor controlled by microprograms, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processor controlled by microprograms will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-754859