Data processor and method of processing data in parallel

Details Data processor and method of processing data in parallel Data processor and method of processing data in parallel

1995-10-06

1997-05-27

Swann, Tod R.

395115, 395116, 395250, 395800, 395501, 395507, G06F 1500

Patent

active

056341075

ABSTRACT:
A plurality of data processing units each having a first controller for computing design data assigned in advance so as to generate graphic data and a first storage device for receiving transfer of the design data and storing the design data temporarily, and a second controller, for when a data storage allowable value of the first storage device which has received transfer of the design data is exceeded, recognizing a data excess flag rising on that occasion, and transferring excessive data in the design data assigned to the one data processing unit to another data processing unit, thereby controlling computation share among data processing units. The design data are converted in parallel into graphic data while monitoring is performed of the data processing units. By adopting such a structure, it is no longer required to increase the number of fields for reassigning design data more than necessary, and it is possible to achieve high-speed processing of parallel data, such as mask data, of the LSI within the capacity of the field memory given to the data processing units.

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Lee et al., "A Fully Distributed Parallel Ray Tracing Scheme on the Delta Touchstone Machine*," IEEE, Aug. 1993, pp. 129-134.
Cheng et al., "Dynamic Load Balancing Algorithms in Loosely-Coupled Real-Time Systems," IEEE, 1992, pp. 143-147.

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