Data processor

Details Data processor Data processor

1997-10-24

1999-08-17

Ray, Gopal C.

395559, G06F 1300

Patent

active

059405996

ABSTRACT:
A start signal is generated which selects, from among a plurality of sub-periods resulting from division of one cycle period of an external clock signal and each having a length equivalent to one cycle period of an internal clock signal, a sub-period at a corresponding position to a setup time of an external device. When the start signal is generated after a CPU (central processing unit) issues a transmission request signal, there is made a transition to a transmission state. An address signal to the external device is held until data transmission starts between the CPU and the external device in synchronization with the external clock signal in the transmission state.

REFERENCES:
patent: 5272729 (1993-12-01), Bechade et al.
patent: 5485602 (1996-01-01), Ledbetter et al.
patent: 5598447 (1997-01-01), Usui
patent: 5811998 (1998-09-01), Lundberg et al.

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