Data processing with adaptable external burst memory access

Details Data processing with adaptable external burst memory access Data processing with adaptable external burst memory access

1995-05-26

1997-09-02

Asta, Frank J.

Boots, shoes, and leggings

395855, 395872, 364DIG1, 711118, 711123, 711138, G06F 1300

Patent

active

056642300

ABSTRACT:
A data processing device includes a data processing core (43), a cache (33) connected to the core and having a cache width, and a bus (31) for receiving from an information source external to the data processing device a burst of information having a width which exceeds the cache width by a width difference. The cache is coupled to the bus to receive and store a first portion of the burst which is equal in width to the cache width. A storage circuit (35) is coupled to the bus to receive and store a second portion of the burst corresponding to the width difference, and the storage circuit has an output coupled to the core.

REFERENCES:
patent: 5014187 (1991-05-01), Debize et al.
patent: 5201041 (1993-04-01), Bohner et al.
patent: 5228134 (1993-07-01), MacWilliams et al.
patent: 5255378 (1993-10-01), Crawford et al.
patent: 5363486 (1994-11-01), Olson et al.
patent: 5438670 (1995-08-01), Baror et al.

Affiliated with

Also associated with

Rating

Data processing with adaptable external burst memory access does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data processing with adaptable external burst memory access, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processing with adaptable external burst memory access will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-317710