Data processing system with latch for sharing instruction fields

Details Data processing system with latch for sharing instruction fields Data processing system with latch for sharing instruction fields

1981-01-26

1983-09-13

Thomas, James D.

Boots, shoes, and leggings

G06F 928, G06F 926, G06F 942

Patent

active

044046294

ABSTRACT:
A microprocessor, having a memory element containing a plurality of multi-bit instruction words, an arithmetic logic (ALU) unit coupled to the memory element and responsive to at least a portion of each of the instruction words for performing data manipulations, and a controller for generating address signals that are communicated to the memory element to cause sequential access of the instruction words, includes a storage element that interconnects certain of the signal lines that communicate the instruction words to the ALU to the controller. In response to a first predetermined instruction word the storage element receives and stores the portion of the instruction word being conducted to the ALU. In response to a second predetermined instruction word, the content of the storage element is transferred to the controller to form an address signal.

REFERENCES:
patent: 3878514 (1975-04-01), Faber
patent: 4042972 (1977-08-01), Gruner
patent: 4073006 (1978-02-01), Tubbs
patent: 4075707 (1978-02-01), Wilmer
patent: 4117536 (1978-09-01), Bodner
patent: 4218757 (1980-08-01), Drogichen
patent: 4253142 (1981-02-01), Bavoux
patent: 4370729 (1983-01-01), Bosch
McDonald, J. F.; Sustman, J. E.; and Harris, R. G. "Fast Register-Transfer-Module Writable Control Store for Microprogrammed Computer Design." Proceedings of the IEEE, vol. 61, No. 11 (Nov. 1973) pp. 1538-1543.
Mick, J. R. "Microprogramming for the Hardware Engineer." 8080 Wescon Technical Papers, vol. 20 (1976) 20, pp. 1-9.

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