Communications: electrical – Digital comparator systems
Patent
1977-03-09
1978-03-14
Pitts, Harold I.
Communications: electrical
Digital comparator systems
340147LP, 340152R, H04Q 900
Patent
active
040793540
ABSTRACT:
Described is a data processing system with an improved data processing operation which is comprised of a central processing unit, a main memory unit, a plurality of input/output control units and a common bus which interconnects all of the above units, wherein the common bus includes at least a data channel, an address channel and a tag channel. The tag channel consists of at least a "write service in" line and a "read service in" line, wherein the "write service in" line transfers a signal which indicates, when the write operation is being conducted, whether or not the information on the data channel and the address channel are available, while the "read service in" line transfers a signal which indicates, when the read operation is being conducted, whether or not the information on the address channel is available, whereby a write operation and a read operation are alternately specified in the system without errors. Further, a single means for providing a bus busy signal is mounted in the system. After one of the data processing unit or input/output control units has requested to occupy the common bus for carrying out the write operation or for carrying out the read operation, and after such occupation of the common bus, the bus busy signal is provided from the single means.
REFERENCES:
patent: 3665398 (1972-05-01), Kawai
Panafacom Limited
Pitts Harold I.
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