Data processing system with high density arithmetic and logic un

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364784, 307471, G06F 748, G06F 750

Patent

active

044357826

ABSTRACT:
A multi-stage, multi-function, arithmetic and logic unit for a data processing system is formed with only a small number of components. Some of the functions (Sum and Exclusive OR) are performed within each stage. For other functions (AND and OR), some of the components of one stage cooperate with different components of the next stage in an arrangement that reduces the total number of components for each stage. For these functions, the output appears shifted one bit position to the left and is then re-shifted one bit position to the right by a conventionally available shifter.

REFERENCES:
patent: 3454751 (1969-07-01), Brastins et al.
patent: 4218747 (1980-08-01), Miura
patent: 4349888 (1982-09-01), Smith

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