Data processing system incorporating a memory resident directive

Details Data processing system incorporating a memory resident directive Data processing system incorporating a memory resident directive

1988-09-29

1990-10-23

Lee, Thomas C.

Boots, shoes, and leggings

3642641, 3642645, 3642713, 3642813, G06F 946, G06F 1130

Patent

active

049657186

ABSTRACT:
In a data processing system of the type including a plurality of processing elements interconnected with each other and with a plurality of memory elements by an interconnection means, a method is provided for accommodating the accessing of a selected memory location in a selected one of the memory elements by at least one requesting processing element to read data stored thereat. The method thereby permits the communication of information between the plurality of processing elements. The method comprising the steps of: sending, from the requesting processing element to the selected memory element via the interconnecting means, a directive including (1) the address of the selected memory location, (2) a comparison value, and (3) an identification of the requesting processing element sending the directive; reading in the selected memory element the data stored at the selected memory location; comparing in the memory element the read data with the comparison value; notifying the requesting processing element via the interconnection means if the read data matches the comparison value; storing the directive in the selected memory element if the read data does not match the comparison value; and repeating the reading, comparing, and notifying steps each time the data in the selected memory location is altered.

REFERENCES:
patent: 3879711 (1975-04-01), Boaron
patent: 4118789 (1978-10-01), Casto et al.
patent: 4320451 (1982-03-01), Bachman et al.
patent: 4456952 (1984-06-01), Mohrman et al.
patent: 4482956 (1984-11-01), Tallman
patent: 4488220 (1984-12-01), Friedli et al.
patent: 4500959 (1985-02-01), Kubo et al.
patent: 4574350 (1986-03-01), Starr
patent: 4584640 (1986-04-01), MacGregor et al.
patent: 4604694 (1986-08-01), Hough
patent: 4635189 (1987-01-01), Kendall
patent: 4642760 (1987-02-01), Yanai et al.
patent: 4745541 (1988-05-01), Vaniglia et al.
"An Introduction to Processing Systems", H. M. Deitel, Addison Wesley Publishing Company, Inc., 1984, pp. 55-71.
"Software Engineering with Ada", G. Booch, Benjamin/Cummings Publishing Co., 1983, pp. 231-235.
IEEE Porceedings of the 1985 International Conference on Parallel Processing, pp. 772-781, "A Methodology for Predicting Multiprocessor Performance", by A. Norton et al.
IEEE Proceedings of the 1985 International Conference on Parallel Processing, pp. 764-771, "The Research Parallel Processor Prototype (RP3): Introduction and Architecture", by G. F. Pfister et al.
IEEE Proceedings of the 1985 International Conference on Parallel Processing, pp. 790-797, "`Hot Spot` Contention and Combining in Multistage Interconnection Networks", by G. F. Pfister et al.
IEEE Proceedings of the 1986 International Conference on Parallel Processing, pp. 28-34, "The Onset of Hot Spot Contention", by M. Kumar et al.
IEEE Proceedings of the 1985 International Conference on Parallel Processing, pp. 782-789, "RP3 Processing-Memory Element", by W. C. Brantley et al.
"Computer Architecture and Parallel Processing", by Hwang and Griggs, McGraw-Hill, Inc., 1984, pp. 375-380.

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