Data processing system including a separate input/output process

Details Data processing system including a separate input/output process Data processing system including a separate input/output process

1978-01-23

1981-10-20

Chapnick, Melvin B.

Boots, shoes, and leggings

G06F 1300, G06F 1516

Patent

active

042964660

ABSTRACT:
A data processing system having a host processor, a host memory, a host memory management unit and an input/output bus and further including a separate input/output (I/O) processor with its own local memory for handling the transfer of data between I/O devices on its own I/O processor I/O bus and the host main memory. The I/O processor has the capability of directly accessing main memory via the host standard data channel. The I/O processor has the capability of interrupting the host processor operation in a special way by a "micro-interrupt" process such that the host processor thereby re-allocates the contents of a selected memory allocation unit (MAP) of the host memory management unit faster than using standard interrupt routines. Such re-allocation then permits the I/O processor to transfer data directly to and from the host main memory via the re-allocated memory management unit without the need for further processing by the host processor, the I/O processor providing a suitable identification of the selected MAP which is to be re-allocated. The system further prevents access to the host memory by any other I/O processor while a first I/O processor is performing a read-modify-write operation with respect to the host memory.

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