Data processing system including a plurality of memory chips eac

Details Data processing system including a plurality of memory chips eac Data processing system including a plurality of memory chips eac

1974-12-20

1976-07-27

Shaw, Gareth D.

Communications: electrical

Digital comparator systems

G06F 1300

Patent

active

039720284

ABSTRACT:
In a circuit arrangement composed of a plurality of highly integrated MOS circuit chips, for use in a data processing device, one chip being an arithmetic and control unit and further chips containing memories, each further chip is also provided with an address register capable of storing a selected memory location address and an address selecting the memory of a selected memory chip for read-out and arranged to count through the successive memory location addresses and to change the memory selecting address after the count reaches the last memory location address, such counting being effected by counting pulses.

REFERENCES:
patent: 3691538 (1972-09-01), Haney
patent: 3757306 (1973-09-01), Boone
patent: 3813650 (1974-05-01), Hunter
patent: 3821715 (1974-06-01), Hoff, Jr.
patent: 3855577 (1974-12-01), Vandierendonck
"Intel MCS-4 Micro Computer Set", Intel Corporation, Jan. 1972.
"MOS/LSI Launches the Low Cost Processor", IEEE Spectrum, Gerald Lapidus, Nov. 1972, pp. 33-40.

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