Data processing system including a memory controller for direct

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395400, 364DIG1, G06F 1200

Patent

active

052261344

ABSTRACT:
A data processing system includes a processor for accessing a memory in either a direct mode or an indirect mode. The memory includes at least two memory banks and two decoders for decoding bank addresses. The decoders produce bank select signals. In direct mode, the decoder outputs are generated according to which bank is addressed. In interleave mode, the two decoder outputs are ANDed to select both banks covering the address range of the selected banks.

REFERENCES:
patent: 4104735 (1978-08-01), Hofmann et al.
patent: 4542486 (1985-09-01), Anami et al.
patent: 4660178 (1987-04-01), Hardee et al.
patent: 4731761 (1988-03-01), Kobayashi
patent: 4967397 (1990-10-01), Walck

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