Data processing system including a main processor and a co-proce

Details Data processing system including a main processor and a co-proce Data processing system including a main processor and a co-proce

1983-12-30

1986-07-01

Eng, David Y.

Boots, shoes, and leggings

G06F 1314, G06F 1342

Patent

active

045983569

ABSTRACT:
In a data processing system including a main processor and a co-processor, a logic circuit is coupled to receive error and busy outputs of the co-processor to generate an interrupt output on co-incidence of active error and busy signals and to latch the busy signal to the main processor to ensure that the main processor will honor the interrupt before executing another co-processor instruction.

REFERENCES:
patent: 3771131 (1973-11-01), Ling
patent: 3786430 (1974-01-01), Hajdu et al.
patent: 3864670 (1975-02-01), Inoue et al.
patent: 3866184 (1975-02-01), Buhrke et al.
patent: 3882455 (1975-05-01), Heck et al.
patent: 4253183 (1981-02-01), Taylor et al.
patent: 4392201 (1983-07-01), Brown et al.

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