Data processing system having multiple register management for c

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364247, 3642624, 364DIG1, 395375, G06F 940

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active

053075021

ABSTRACT:
In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing. Besides, an address part for designating main memory is provided in the same instruction.

REFERENCES:
patent: 4323963 (1982-04-01), Wu
patent: 4680701 (1987-07-01), Cochran
patent: 4777588 (1988-10-01), Case
Organization of a Mini Computer by R. W. Prowse, Brunel Univ. Dec. 1971, pp. 1-18, FIG. 1-9.
Ring Bank Mode Speeds 16 Bit Microoperation by Stuart Miller, New Electronics, Oct. 1988 p. 43, vol. 19, No. 14.
Impact of GaAs on Microprocessor architecture by V. Milutinovic et al., Proceedings IEEE, Intl. Conf. Computor Des., Oct. 1985 pp. 30-40.

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