Electrical computers and digital processing systems: processing – Processing architecture – Vector processor
Reexamination Certificate
2008-01-01
2008-01-01
Pan, Daniel H. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Vector processor
C712S022000, C712S027000, C712S225000
Reexamination Certificate
active
10657331
ABSTRACT:
Various load and store instructions may be used to transfer multiple vector elements between registers in a register file and memory. A cnt parameter may be used to indicate a total number of elements to be transferred to or from memory, and an rcnt parameter may be used to indicate a maximum number of vector elements that may be transferred to or from a single register within a register file. Also, the instructions may use a variety of different addressing modes. The memory element size may be specified independently from the register element size such that source and destination sizes may differ within an instruction. With some instructions, a vector stream may be initiated and conditionally enqueued or dequeued. Truncation or rounding fields may be provided such that source data elements may be truncated or rounded when transferred. Also, source data elements may be sign- or unsigned-extended when transferred.
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Chiu Joanna G.
King Robert L.
Pan Daniel H.
Singh Ranjeev
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