Data processing system having automatic address allocation arran

Details Data processing system having automatic address allocation arran Data processing system having automatic address allocation arran

1987-10-28

1990-10-16

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 300

Patent

active

049640380

ABSTRACT:
A data processing system in which any one of a plurality of different or similar interface circuit cards can be located into any one of a number of slots of the data processing system without preassignment. The system includes a master processor which communicates with the interface cards through a data bus, address bus and control bus. Each interface card includes decoding means which computes during an initialization sequence a random address which will be used to decode the address bus after the initialization sequence. Once the different cards have their specific addresses, the system can reassign a new address according to the identifier register and the nature of the card thereby allowing the application programs to address each card separately and irrespective of the prior random address. This system may be used in small computers like the personal computer which are not designed with any slot identifier device.

REFERENCES:
patent: 4556953 (1985-12-01), Caprio et al.
patent: 4660141 (1987-04-01), Ceccon et al.
patent: 4670855 (1987-06-01), Caprio et al.

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