Boots – shoes – and leggings
Patent
1990-01-02
1993-05-11
Lee, Thomas C.
Boots, shoes, and leggings
395800, 395425, 364DIG1, 3642523, 3642526, 3642549, 3642551, 3642554, G06F 930, G06F 9308
Patent
active
052108350
ABSTRACT:
In addition to an ordinary bit field instruction without limitation which makes use of an offset value and a field width, a bit field instruction with limitation which does not calculate the spread of the bit field is separately installed. In the present invention the calculation for determination of the spread of the bit field is not performed when the bit field instruction with limitation is executed. In addition, when executing a bit field instruction with limitation, the offset value and the field width can be obtained directly as immediate values thereby decreasing the execution time of the instruction.
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patent: 4785393 (1988-11-01), Chu et al.
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Hasegawa Atsushi
Iwasaki Kazuhiko
Kawasaki Ikuya
Nakazawa Takuichiro
Sakamura Ken
Donaghue L.
Hitachi , Ltd.
Hitachi Microcomputer Engineering Co., Ltd.
Lee Thomas C.
Sakamura Ken
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