Electrical computers and digital processing systems: processing – Instruction fetching
Reexamination Certificate
2008-07-29
2008-07-29
Dollinger, Tonia L. M. (Department: 2181)
Electrical computers and digital processing systems: processing
Instruction fetching
Reexamination Certificate
active
07406585
ABSTRACT:
There is provided a system havingan execution core operable to execute internal instructions.A translation buffer is operable to store a plurality of internal instruction blocks of one or more internal instructions where the internal instruction blocks are a dynamic translation of respective external instruction blocks of one or more external instructions.A remapper is responsive to an execution request for an external instruction that is within one of said external instruction blocks to identify a corresponding internal instruction block stored within said translation buffer. Thus one or more internal instructions from said corresponding internal instruction block can be supplied to execution core.
REFERENCES:
patent: 5249286 (1993-09-01), Alpert et al.
patent: 5481751 (1996-01-01), Alpert et al.
patent: 5742802 (1998-04-01), Harter et al.
patent: 6012125 (2000-01-01), Tran
patent: 6216206 (2001-04-01), Peled et al.
patent: 6223254 (2001-04-01), Soni
patent: 6233678 (2001-05-01), Bala
patent: 6363336 (2002-03-01), Banning et al.
patent: 2002/0066081 (2002-05-01), Duesterwald et al.
patent: 0716375 (1996-06-01), None
patent: 0930572 (1999-07-01), None
patent: 1039374 (2000-02-01), None
patent: 1006438 (2000-06-01), None
patent: 1 313 008 (2003-05-01), None
patent: 2 374 698 (2002-10-01), None
patent: 2 397 918 (2004-08-01), None
patent: 98/00779 (1998-01-01), None
“The Block-based Trace Cache”; Black et al.; 1999; IEEE.
“Micro-Operation Cache: A Power Aware Frontend for Variable Instruction Length ISA”; Solomon et al.; 2001; ACM.
“Computer Architecture: A Quantitative Approach”; Third Edition; Hennessy et al.; May 2002.
B. Cmelik et al, “Shade: A Fast Instruction-Set Simulator for Execution Profiling” Performance Evaluation Review, Association for Computing Machinery, vol. 22, No. 1, May 1994, pp. 128-137.
Flautner Krisztian
Rose Andrew Christopher
ARM Limited
Dollinger Tonia L. M.
Geib Benjamin
Nixon & Vanderhye P.C.
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