Boots – shoes – and leggings
Patent
1984-03-23
1986-07-22
Springborn, Harvey E.
Boots, shoes, and leggings
G06F 1210, G06F 1312
Patent
active
046023291
ABSTRACT:
In a data processing system for use in accessing a main memory from each of a central processing unit and a channel unit through a common data bus, an address translation circuit is incorporated in the central processing unit so as to translate each logical address into a real address physically allotted to the main memory and is used in common by the central processing unit and the channel unit. Address translation is carried out by the address translation circuit selectively for the central processing unit and the channel unit. When the main memory is accessed from the channel unit through the central processing unit, an indication signal is delivered from the main memory only to the central processing unit to indicate either reception or supply of a data group. The central processing unit energizes the channel unit to assign the data bus to the channel unit. Thereafter, the data group is transferred between the main memory and the channel unit through the data bus.
REFERENCES:
patent: 3810105 (1974-05-01), England
patent: 3820079 (1974-06-01), Bergh et al.
patent: 4137565 (1979-01-01), Mager et al.
patent: 4189769 (1980-02-01), Cook et al.
NEC Corporation
Springborn Harvey E.
Williams A.
LandOfFree
Data processing system having an address translation unit shared does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data processing system having an address translation unit shared, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processing system having an address translation unit shared will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-869050