Data processing system having a saturation arithmetic operation

Details Data processing system having a saturation arithmetic operation Data processing system having a saturation arithmetic operation

1995-06-12

1997-11-04

Malzann, David H.

Boots, shoes, and leggings

G06F 738

Patent

active

056847289

ABSTRACT:
A data processing system includes an instruction decoder for decoding a string of instructions including an arithmetic operation instruction, an arithmetic operation unit controlled by the instruction decoder for executing a designated arithmetic operation for a received data, the arithmetic operation unit outputting not only the result of the designated arithmetic operation, but also a sign information and an overflow/underflow information of the result of the designated arithmetic operation, and a saturation detecting circuit receiving the sign information and the overflow/underflow information for controlling a selector in such a manner that if an overflow has occurred when the sign information indicates the positive, the selector selects a positive maximum value; if an underflow has occurred when the sign information indicates the negative, the selector selects a negative maximum value; and if neither the overflow nor the underflow has occurred, the selector selects the result of arithmetic operation outputted from the arithmetic operation unit. Furthermore, if the overflow has occurred when the sign information indicates the positive, or if the underflow has occurred when the sign information indicates the negative, the saturation detecting circuit sets a saturation flag of a PSW indicative of existence
on-existence of a saturation processing. After the saturation flag is set, the saturation flag is reset by only execution of a data transfer instruction by the arithmetic operation unit.

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Guttag, "Built-in overflow detection speeds 16-bit .mu.P arithmetic", 2119 E.D.N. Electrical Design News, vol. 28 (1983) Jan., No. 1, Boston, MA, USA, pp.133-135.
IBM Technical Disclosure Bulletin, vol. 24, No. 7A, Dec. 1981, pp. 3126-3127, W. R. Hedeman III: "Fixed point overflow exception detection".

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