Data processing system for handling multiple independent data-dr

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364DIG1, 364DIG2, 364228, 3642283, 364230, 3642624, 364263, G06F 700

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active

055308163

ABSTRACT:
A data processing system has a scheduling unit for scheduling instructions from a number of instruction streams, and assigning those instructions to a number of execution units. A termination unit receives the results of the execution and informs the scheduling unit of which operands are available. The scheduling unit uses the operand availability information to control the scheduling of the instructions.

REFERENCES:
patent: 3728692 (1993-04-01), Fennel
patent: 5233694 (1993-08-01), Hotta et al.
patent: 5247628 (1993-09-01), Grohoski
Dollas et al., "The Case For the Sustained Performance Computer Architecture", Computer Architecture News, vol. 17, No. 6, Dec. 1991, pp. 129-136.
Hirata et al., "An Elementary Processor Architecture With Simultaneous Instruction Issuing From Multiple Threads", Computer Architecture News, vol. 20, No. 2, May 1992, pp. 136-145.
Lighten et al., "The Metaflow Lightening Chipset", Spring Compcon 91, 36th IEEE Computer Society International Conference, San Francisco, Feb. 25, 1991, pp. 13-18.
Andrew S. Tanenbaum "Structured Computer Organization" ISBN-O-14 854489-1 (1984) pp. 10-12.

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