Data processing system for generating symmetrical range of addre

Details Data processing system for generating symmetrical range of addre Data processing system for generating symmetrical range of addre

1992-10-27

1995-01-31

Lall, Parshotam S.

Boots, shoes, and leggings

395375, 3642511, 3642551, 3642472, 3642548, 3642552, 3642555, G06F 1206, G06F 934

Patent

active

053865340

ABSTRACT:
A data processing system (10) performs indexed addressing, autoincrementing, and autodecrementing using power of two byte boundaries. For example, a 5-bit offset allows a user to progress sixteen bytes either forward or backward through a table of data. An instruction specifying an operation to be performed, a pointer register (58, 60), and an offset value is provided to an execution unit (14). The pointer register (58, 60) stores a first address value and the offset value has a sign and a magnitude. An arithmetic logic unit, ALU, (52) inverts the sign of the offset value to provide an inverted sign value. A plurality of adders (100, 102, 104, 106, and 108) adds the offset value, the first address value, and the inverted sign value to generate an offset sum. A positive offset value is increased by one to generate a symmetric power of two offset range.

REFERENCES:
patent: 4075688 (1978-02-01), Lynch, Jr. et al.
patent: 4432053 (1984-02-01), Gaither et al.
patent: 4466056 (1984-08-01), Tanahashi
patent: 4531200 (1985-07-01), Whitley
patent: 4538223 (1985-08-01), Vahlstrom et al.
patent: 4799151 (1989-01-01), Iwao
patent: 4819165 (1989-04-01), Lenoski
patent: 4916606 (1990-04-01), Yamaoka et al.
patent: 4935867 (1990-06-01), Wang et al.
patent: 5148538 (1992-09-01), Celtruda et al.
patent: 5150471 (1992-09-01), Tipon et al.
patent: 5155818 (1992-10-01), Stein et al.
patent: 5204953 (1993-04-01), Dixit
patent: 5226129 (1993-07-01), Ooi et al.
patent: 5269012 (1993-12-01), Nakajima
patent: 5276819 (1994-01-01), Rau et al.
patent: 5283874 (1994-02-01), Hammond
"MC6809-MC6809E Microprocessor Programming Manual" published by Motorola, Inc. on Mar. 1, 1981, pp. 2-1 to 2-5/2-6.
"M68HC11 Reference Manual" published by Motorola, Inc. in 1988, pp. 6-9 to 6-10.
Intel; "i486.TM. Processor Programmer's Reference Manual"; pp. 2-3, 2-6, 2-7, 2-15 to 2-16, and E-21 1990.
Intel; "i486.TM. Processor Hardware Reference Manual"; pp. 1-1 to 1-3, 2-2, 2-3, 2-11 & 2-13, 1990.
Tanenbaum; "Structured Computer Organization"; Prentice-Hall, pp. 213-241, 1984.

Affiliated with

Also associated with

Rating

Data processing system for generating symmetrical range of addre does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data processing system for generating symmetrical range of addre, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processing system for generating symmetrical range of addre will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1108147