Data processing system for floating point data having a variable

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364748, 340347DD, 235310, 235311, G06F 1531

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active

046758097

ABSTRACT:
An execution processing device for executing variable length floating-point data of exponent part designated by two or more kinds of representation systems and fixed length floating-point data of exponent part designated by two or more kinds of representation systems, includes a converting circuit which converts the data of various representation systems into a common representation system which is capable of expressing the data in a common data form responsive to an operation mode that is provided to discriminate the various representation systems at the time of reading and operating on the data of the various representation systems stored in a storage unit according to the same load instruction. An arithmetic unit introduces the data converted by said converting circuit into the common representation system, which performs the operation designated by the same instruction, and which produces the operation result as the data of the common representation system. A converting circuit converts the data of the common representation system into said various representation systems to store them in the storage unit responsive to the operation mode at the time of storing the data produced from the arithmetic unit in the storage unit according to the same store instruction.

REFERENCES:
patent: 4189715 (1980-02-01), Duttweiler
patent: 4608554 (1986-08-01), Blair
patent: 4617641 (1986-10-01), Hamada
patent: 4620292 (1986-10-01), Hagiwara
IBM Technical Disclosure Bulletin, vol. 23, No. 1, Jun. 1980, "Biased and Non-Biased Binary Conversion and Exponent Under/Over Flow Dectection", J. L. Hale, R. C. Letterey, D. T. Shen and K. G. Tan, pp. 252-254.

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