Data processing system for concurrent dispatch of instructions t

Details Data processing system for concurrent dispatch of instructions t Data processing system for concurrent dispatch of instructions t

1988-10-07

1991-09-24

Williams, Jr., Archie E.

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3642476, 364263, 3642629, 3642631, 3642624, 364260, 3642549, 3642599, 364259, 3649371, 3649378, 364947, 364948, 3649483, 36494834, 36494831, 3649462, 364956, 3649611, 3649613, 3649691, 364966, G06F 928, G06F 9302, G06F 1204, G06F 1516

Patent

active

050518852

ABSTRACT:
Apparatus and method for concurrent dispatch of instruction words which selectively comprise instruction components which are separately and substantially simultaneously received by distinct floating point and integer functional units. The instruction words are powers of 2 in length, (measured in terms of the smallest machine addressable unit) typically a 4 byte longword and an 8 byte quadword aligned to the natural boundaries also corresponding to powers of 2. To provide maximum operating efficiency, each functional (or processing) unit executes a component of an instruction word during an execution cycle. The type and length of the instruction word are indicated by one of the bit fields of the instruction word, which permits the apparatus to properly detect, store and transfer the instruction word to the appropriate functional unit. The invention combines the encoding efficiency of variable length instruction combined combined with the enhanced processing speed of simultaneous operation of all available functional units, to provide the execution efficiency of systems with a single instruction length.

REFERENCES:
patent: 4926323 (1990-05-01), Baror

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