Data processing system capable of transferring single-byte and d

Details Data processing system capable of transferring single-byte and d Data processing system capable of transferring single-byte and d

1982-11-23

1986-12-23

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 304

Patent

active

046316710

ABSTRACT:
A data processing system having a data bus with a two-byte capacity provides for the DMA transfer of both one-byte data and two-byte data between a memory and an input/output adapter. An address counter and a byte counter receive a start address and a byte number indicating the number of bytes to be transferred, respectively, through the system bus from the processor. The least significant bits in the start address and the byte number are used to control whether the data transfer on the bus will be a one-byte transfer or a two-byte transfer for the first transfer operation and the last transfer operation.

REFERENCES:
patent: 4263650 (1981-04-01), Bennett et al.
patent: 4292668 (1981-09-01), Miller et al.
patent: 4300193 (1981-11-01), Bradley et al.
patent: 4378591 (1983-03-01), Lemay
patent: 4514808 (1985-04-01), Murayama et al.
patent: 4530053 (1985-07-01), Kirz et al.
Intel Component Data Catalog 1980, Intel Corp. 3065 Bowers Ave., Santa Clara, CA, 95051.
Zilog Data Book 1982, Zilog Inc., 1315 Dell Drive, Campbell, CA., 95008.

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