Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1997-10-28
1999-02-09
Le, Vu A.
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
365194, G11C 700
Patent
active
058703497
ABSTRACT:
The data processing system of the present invention implements a multi-port memory cell, wherein the port functions are divided based on a timing cycle in which they may be accessed. For example, in one case, a first port may be utilized only for read operations and accessed only during a first portion of the timing cycle. Similarly, a second port may be used for read or write operations a and may be accessed only during a second portion of the timing cycle. To ensure that the multi-port memory cell functions correctly, both ports should not be accessed simultaneously. A circuit and method are implemented to ensure that both ports are not accessed simultaneously by implementing a delay function in a unique and useful manner.
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Lattimore George McNeil
Ross, Jr. Robert Anthony
Smadi Mithkal Moh'd
Apperley Elizabeth A.
England Anthony V. S.
International Business Machines - Corporation
Le Vu A.
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