Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2008-05-27
2008-05-27
Dollinger, Tonia L. M. (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S024000, C712S225000
Reexamination Certificate
active
10399360
ABSTRACT:
The present invention provides a data processing system that includes a plurality of processing units and first, second, and third data transfer means. The first data transfer means connects a plurality of processing units in a network, exchanges first data, and configures at least one reconfigurable data flow by connecting at least two of the plurality of processing units. The second data transfer means supplies control information that loads setting data as second data to the plurality of processing units in parallel. The third data transfer means supplies the setting data to each of the plurality of the processing units individually. Setting data is data for setting a data flow with a different function by directly or indirectly changing other processing unit connected to a processing unit via the first data transfer means, and/or changing a process included in the processing unit.
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Ikeda Kenji
Sato Tomoyoshi
Shimura Hiroshi
Dollinger Tonia L. M.
IPFlex Inc.
Marshall & Gerstein & Borun LLP
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