Boots – shoes – and leggings
Patent
1981-11-20
1984-05-29
Atkinson, Charles E.
Boots, shoes, and leggings
G06F 918, G06F 916, G06F 1516
Patent
active
044518820
ABSTRACT:
A data processing system intended for handling multiple tasks and comprising at least two processors, a memory unit and an I/O unit which are all connected to a data address and control signal transmission line. Each of the processors comprises an arithmetic-logic unit, a scratch pad memory, a processor status register, an interface, and a control unit which are all interconnected by a processor data bus. Each of the processors further contains an address interrupt unit whose input/output is connected to the data address and control signal transmission line. A first output of the address interrupt unit is connected to the processor data bus and its second output is connected to a second input of the control unit. A second control output of the control unit is connected to the input of the address interrupt unit. The invention helps increase the throughput of a data processing system and simplify the programming of interaction between the system's processors.
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patent: 4077060 (1978-02-01), Bodner et al.
patent: 4151592 (1979-04-01), Suzuki et al.
patent: 4156278 (1979-05-01), Wilhite
"Multiprocessing Adds Muscle to PS", Electronic Design No. 11, 1978, pp. 238-244.
Chicherin Jury E.
Dshkhunian Valery L.
Ivanov Eduard E.
Kovalenko Sergei S.
Mashevich Pavel R.
Atkinson Charles E.
Niessen William G.
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