Data processing method and circuit for data recording and...

Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes

Reexamination Certificate

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C341S050000

Reexamination Certificate

active

11280435

ABSTRACT:
Embodiments of the invention a signal processing method capable of realizing low decoding error ratio by using a simple configuration free from unnecessary redundant bits. In one embodiment, user data (512 bytes+additional data) input to an input terminal is RLL-encoded by a RLL encoder1. The data from the RLL encoder—1is entered into a symbol error correction encoder where 9-bit symbol encoding is done. Its RS code portion is RLL-encoded by a RLL encoder—2. Signal read from a magnetic disk is entered into a RLL decoder—2where the RS code portion is RLL-decoded. The signal from the RLL decoder—2is then entered into a symbol error correction decoder where random read/write errors, burst errors attributable to defects and other errors are corrected to produce a (user data+RLL) signal. This data is output to an output terminal after being decoded by a RLL decoder—1.

REFERENCES:
patent: 6631490 (2003-10-01), Shimoda
patent: 6694477 (2004-02-01), Lee
patent: 6757122 (2004-06-01), Kuznetsov et al.
patent: 6933865 (2005-08-01), Kuznetsov et al.
patent: 11-007736 (1999-01-01), None

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